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US Patent Issued to Infineon Technologies on Sept. 8 for "Semiconductor device with termination structure and field-free region" (German Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,458, issued on Sept. 8, was assigned to Infineon Technologies AG (Neubiberg, Germany). "Semiconductor device with termination structure and... Read More


US Patent Issued to CHANGXIN MEMORY TECHNOLOGIES on Sept. 8 for "Package structure having a semiconductor functional structure and redistribution layers (RDLs)" (Chinese Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,459, issued on Sept. 8, was assigned to CHANGXIN MEMORY TECHNOLOGIES INC. (Hefei City, China). "Package structure having a semiconductor fu... Read More


US Patent Issued to SAMSUNG ELECTRONICS on Sept. 8 for "Substrate including test circuit and substrate test apparatus including the substrate" (South Korean Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,460, issued on Sept. 8, was assigned to SAMSUNG ELECTRONICS Co. Ltd. (Gyeonggi-do, South Korea). "Substrate including test circuit and subs... Read More


US Patent Issued to DENSO, TOYOTA JIDOSHA, MIRISE Technologies, National University Corporation Tokai National Higher Education and Research System, HAMAMATSU PHOTONICS on Sept. 8 for "Semiconductor wafer processing apparatus and method of manufacturing semiconductor element" (Japanese Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,461, issued on Sept. 8, was assigned to DENSO Corp. (Kariya-city, Japan), TOYOTA JIDOSHA K.K. (Toyota, Japan), MIRISE Technologies Corp. (Ni... Read More


US Patent Issued to TEXAS INSTRUMENTS on Sept. 8 for "Apparatus with overlapping deep trench and shallow trench and method of fabricating the same with low defect density" (Texas Inventor)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,462, issued on Sept. 8, was assigned to TEXAS INSTRUMENTS Inc. (Dallas). "Apparatus with overlapping deep trench and shallow trench and met... Read More


US Patent Issued to APPLIED MATERIALS on Sept. 8 for "Buffer layer for dielectric protection in physical vapor deposition metal liner applications" (California Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,463, issued on Sept. 8, was assigned to APPLIED MATERIALS Inc. (Santa Clara, Calif.). "Buffer layer for dielectric protection in physical v... Read More


US Patent Issued to Taiwan Semiconductor Manufacturing on Sept. 8 for "Structure having 2D material capping layer and manufacturing method thereof" (Taiwanese Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,464, issued on Sept. 8, was assigned to Taiwan Semiconductor Manufacturing Co. Ltd. (Hsinchu, Taiwan). "Structure having 2D material cappin... Read More


US Patent Issued to Taiwan Semiconductor Manufacturing on Sept. 8 for "Conductive structures and methods of forming the same" (Taiwanese, American Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,465, issued on Sept. 8, was assigned to Taiwan Semiconductor Manufacturing Co. Ltd. (Hsinchu, Taiwan). "Conductive structures and methods o... Read More


US Patent Issued to Applied Materials on Sept. 8 for "Integrated PVD tungsten liner and seamless CVD tungsten fill" (California Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,466, issued on Sept. 8, was assigned to Applied Materials Inc. (Santa Clara, Calif.). "Integrated PVD tungsten liner and seamless CVD tungs... Read More


US Patent Issued to Georgia Tech Research on Sept. 8 for "Methods for etch barrier deposition and devices made according to the same" (Georgia Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,467, issued on Sept. 8, was assigned to Georgia Tech Research Corp. (Atlanta). "Methods for etch barrier deposition and devices made accord... Read More