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US Patent Issued to Taiwan Semiconductor Manufacturing on Sept. 8 for "Thin film transistor including a compositionally-graded gate dielectric and methods for forming the same" (Taiwanese Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,212, issued on Sept. 8, was assigned to Taiwan Semiconductor Manufacturing Co. Ltd. (Hsinchu, Taiwan). "Thin film transistor including a co... Read More


US Patent Issued to SAMSUNG ELECTRONICS on Sept. 8 for "Field effect transistor with multi-layer metal oxide semiconductor and multi-layer metal oxide gate dielectric, and integrated circuit device including the same" (South Korean Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,213, issued on Sept. 8, was assigned to SAMSUNG ELECTRONICS Co. LTD. (Suwon-si, South Korea). "Field effect transistor with multi-layer met... Read More


US Patent Issued to Taiwan Semiconductor Manufacturing on Sept. 8 for "Surface-doped channels for threshold voltage modulation" (Taiwanese Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,214, issued on Sept. 8, was assigned to Taiwan Semiconductor Manufacturing Co. Ltd. (Hsinchu, Taiwan). "Surface-doped channels for threshol... Read More


US Patent Issued to Mitsubishi Electric on Sept. 8 for "Semiconductor device comprising a first electrode, a second electrode, an interlayer film on the first electrode, and a protective film on the interlayer film; and semiconductor module comprising the semiconductor device" (Japanese Inventor)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,215, issued on Sept. 8, was assigned to Mitsubishi Electric Corp. (Tokyo). "Semiconductor device comprising a first electrode, a second ele... Read More


US Patent Issued to FUJI ELECTRIC on Sept. 8 for "Manufacturing method of forming a buffer region of semiconductor device and semiconductor device" (Japanese Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,216, issued on Sept. 8, was assigned to FUJI ELECTRIC Co. LTD. (Kanagawa, Japan). "Manufacturing method of forming a buffer region of semic... Read More


US Patent Issued to Wolfspeed on Sept. 8 for "Gate trench power semiconductor devices having deep support shields and methods of fabricating such device" (North Carolina Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,217, issued on Sept. 8, was assigned to Wolfspeed Inc. (Durham, N.C.). "Gate trench power semiconductor devices having deep support shields... Read More


US Patent Issued to FUJI ELECTRIC on Sept. 8 for "Semiconductor device with a first parallel pn structure in the active region and a second parallel pn structure in the termination region wherein the depth of the second parallel structure becomes stepwise shallower towards the periphery" (Japanese Inventor)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,218, issued on Sept. 8, was assigned to FUJI ELECTRIC Co. LTD. (Kawasaki, Japan). "Semiconductor device with a first parallel pn structure ... Read More


US Patent Issued to SAMSUNG ELECTRONICS on Sept. 8 for "Semiconductor device including backside isolation structure and placeholder isolation structure" (New York, Virginia Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,219, issued on Sept. 8, was assigned to SAMSUNG ELECTRONICS Co. Ltd. (South Korea). "Semiconductor device including backside isolation stru... Read More


US Patent Issued to International Business Machines on Sept. 8 for "Nanosheet transistor device with bottom isolation" (New York, California Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,220, issued on Sept. 8, was assigned to International Business Machines Corp. (Armonk, N.Y.). "Nanosheet transistor device with bottom isol... Read More


US Patent Issued to Intel on Sept. 8 for "Integrated circuit structures with backside self-aligned conductive source or drain contact" (Oregon Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,221, issued on Sept. 8, was assigned to Intel Corp. (Santa Clara, Calif.). "Integrated circuit structures with backside self-aligned conduc... Read More