Exclusive

Publication

Byline

US Patent Issued to Taiwan Semiconductor Manufacturing on May 26 for "Vertical self aligned gate all around transistor" (Taiwanese Inventors)

ALEXANDRIA, Va., May 26 -- United States Patent no. 12,641,830, issued on May 26, was assigned to Taiwan Semiconductor Manufacturing Co. Ltd. (Hsinchu, Taiwan). "Vertical self aligned gate all around... Read More


US Patent Issued to TAIWAN SEMICONDUCTOR MANUFACTURING on May 26 for "Gate structures of semiconductor devices and fabrication methods thereof" (Taiwanese Inventors)

ALEXANDRIA, Va., May 26 -- United States Patent no. 12,641,831, issued on May 26, was assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. (Hsinchu, Taiwan). "Gate structures of semiconductor ... Read More


US Patent Issued to LG Display on May 26 for "Thin film transistor with flourine gradient active layer and fabricating method thereof" (South Korean Inventors)

ALEXANDRIA, Va., May 26 -- United States Patent no. 12,641,832, issued on May 26, was assigned to LG Display Co. Ltd. (Seoul, South Korea). "Thin film transistor with flourine gradient active layer a... Read More


US Patent Issued to Beijing BOE Technology Development, BOE TECHNOLOGY GROUP on May 26 for "Thin film transistor, manufacturing method thereof and circuit" (Chinese Inventors)

ALEXANDRIA, Va., May 26 -- United States Patent no. 12,641,833, issued on May 26, was assigned to Beijing BOE Technology Development Co. Ltd. (Beijing) and BOE TECHNOLOGY GROUP Co. LTD. (Beijing). "T... Read More


US Patent Issued to TAIWAN SEMICONDUCTOR MANUFACTURING on May 26 for "Semiconductor device capable of releasing process charge, and method for manufacturing the same" (Taiwanese Inventors)

ALEXANDRIA, Va., May 26 -- United States Patent no. 12,641,834, issued on May 26, was assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. (Hsinchu, Taiwan). "Semiconductor device capable of r... Read More


US Patent Issued to Micron Technology on May 26 for "Dielectric engineered tunnel region in memory cells" (Idaho Inventors)

ALEXANDRIA, Va., May 26 -- United States Patent no. 12,641,835, issued on May 26, was assigned to Micron Technology Inc. (Boise, Idaho). "Dielectric engineered tunnel region in memory cells" was inve... Read More


US Patent Issued to KOKUSAI ELECTRIC, NATIONAL INSITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY on May 26 for "Semiconductor device" (Japanese Inventors)

ALEXANDRIA, Va., May 26 -- United States Patent no. 12,641,836, issued on May 26, was assigned to KOKUSAI ELECTRIC Corp. (Tokyo) and NATIONAL INSITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY (To... Read More


US Patent Issued to CSMC TECHNOLOGIES FAB2 on May 26 for "Super-Beta bipolar junction transistor and manufacturing method therefor" (Chinese Inventors)

ALEXANDRIA, Va., May 26 -- United States Patent no. 12,641,839, issued on May 26, was assigned to CSMC TECHNOLOGIES FAB2 Co. LTD. (Wuxi, China). "Super-Beta bipolar junction transistor and manufactur... Read More


US Patent Issued to MediaTek on May 26 for "Self-aligned gate edge and local interconnect" (Oregon Inventors)

ALEXANDRIA, Va., May 26 -- United States Patent no. 12,641,840, issued on May 26, was assigned to MediaTek Inc. (Hsinchu City, Taiwan). "Self-aligned gate edge and local interconnect" was invented by... Read More


US Patent Issued to STMicroelectronics (Crolles 2) on May 26 for "Electronic device manufacturing method" (French Inventors)

ALEXANDRIA, Va., May 26 -- United States Patent no. 12,641,841, issued on May 26, was assigned to STMicroelectronics (Crolles 2) SAS (Crolles, France). "Electronic device manufacturing method" was in... Read More