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US Patent Issued to Intel on Sept. 8 for "Selective bottomless graphene lined interconnects" (Oregon Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,478, issued on Sept. 8, was assigned to Intel Corp. (Santa Clara, Calif.). "Selective bottomless graphene lined interconnects" was invented... Read More


US Patent Issued to Intel on Sept. 8 for "Integrated circuit (IC) device with multilayer metal line" (Oregon, New Mexico Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,479, issued on Sept. 8, was assigned to Intel Corp. (Santa Clara, Calif.). "Integrated circuit (IC) device with multilayer metal line" was ... Read More


US Patent Issued to COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES on Sept. 8 for "Device for detecting an electromagnetic radiation including a thermal detector over a readout substrate an active electronic element of which is located the closest to the thermal detector" (French Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,480, issued on Sept. 8, was assigned to COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES (Paris). "Device for detecting an el... Read More


US Patent Issued to TAIWAN SEMICONDUCTOR MANUFACTURING on Sept. 8 for "Device having different first metallization layer and first buried metallization layer architectures and method of manufacturing same" (Taiwanese Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,481, issued on Sept. 8, was assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. (Hsinchu, Taiwan). "Device having different first m... Read More


US Patent Issued to Intel on Sept. 8 for "Etch stop layer for backside processing architecture" (Oregon, California Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,482, issued on Sept. 8, was assigned to Intel Corp. (Santa Clara, Calif.). "Etch stop layer for backside processing architecture" was inven... Read More


US Patent Issued to Taiwan Semiconductor Manufacturing on Sept. 8 for "Transistor with source and drain via structures" (Taiwanese Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,483, issued on Sept. 8, was assigned to Taiwan Semiconductor Manufacturing Co. Ltd. (Hsinchu, China). "Transistor with source and drain via... Read More


US Patent Issued to Sandisk Technologies on Sept. 8 for "Three-dimensional memory device containing multi-level word line contact wells and methods for manufacturing the same" (California Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,484, issued on Sept. 8, was assigned to Sandisk Technologies Inc. (Milpitas, Calif.). "Three-dimensional memory device containing multi-lev... Read More


US Patent Issued to TAIWAN SEMICONDUCTOR MANUFACTURING on Sept. 8 for "Passive devices in bonding layers" (Taiwanese Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,485, issued on Sept. 8, was assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. (Hsinchu, Taiwan). "Passive devices in bonding laye... Read More


US Patent Issued to QUALCOMM on Sept. 8 for "Inductor performance enhancement using an outer, peripheral patterned ground shield" (California Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,486, issued on Sept. 8, was assigned to QUALCOMM Inc. (San Diego). "Inductor performance enhancement using an outer, peripheral patterned g... Read More


US Patent Issued to SAMSUNG ELECTRONICS on Sept. 8 for "Semiconductor package" (South Korean Inventors)

ALEXANDRIA, Va., Sept. 8 -- United States Patent no. 12,733,487, issued on Sept. 8, was assigned to SAMSUNG ELECTRONICS Co. LTD. (Suwon-si, South Korea). "Semiconductor package" was invented by Young... Read More