ALEXANDRIA, Va., May 12 -- United States Patent no. 12,628,411, issued on May 12, was assigned to Tokyo Electron Ltd. (Tokyo).
"Method of forming confined growth S/D contact defined by sidewall constraints with selective deposition of inner spacer for CFET" was invented by Jeffrey Smith (Clifton Park, N.Y.).
According to the abstract* released by the U.S. Patent & Trademark Office: "A method of manufacturing a semiconductor device includes forming a stack of epitaxially grown layers alternating between a first semiconductor material and a second semiconductor material that is etch selective to the first semiconductor material. Fin structures are formed from the stack. The fin structures include channel structures formed of the first semic...