US Patent Issued to Tokyo Electron on Feb. 24 for "Top-down self-alignment of vias in a semiconductor device for sub-22NM pitch metals" (New York Inventors)

ALEXANDRIA, Va., Feb. 24 -- United States Patent no. 12,564,027, issued on Feb. 24, was assigned to Tokyo Electron Ltd. (Tokyo).

"Top-down self-alignment of vias in a semiconductor device for sub-22NM pitch metals" was invented by Jeffrey Smith (Clifton Park, N.Y.), David Power (Saratoga Springs, N.Y.), Eric Chih-Fang Liu (Niskayuna, N.Y.), Anton J. Devilliers (Clifton Park, N.Y.), Kandabara Tapily (Mechanicsville, N.Y.), Jodi Grzeskowiak (Schenectady, N.Y.), David Conklin (Saratoga Springs, N.Y.) and Michael Murphy (Schenectady, N.Y.).

According to the abstract* released by the U.S. Patent & Trademark Office: "A process includes forming, over a dielectric layer, a hardmask stack including a first layer below a second layer below a third ...