US Patent Issued to The Regents of the University of California on Sept. 1 for "DTC linearization via mismatch-noise cancellation for digital fractional-N PLLs" (California Inventors)

ALEXANDRIA, Va., Sept. 1 -- United States Patent no. 12,726,212, issued on Sept. 1, was assigned to The Regents of the University of California (Oakland, Calif.).

"DTC linearization via mismatch-noise cancellation for digital fractional-N PLLs" was invented by Ian Andrew Galton (Del Mar, Calif.), Amr Eissa (La Jolla, Calif.) and Eslam Helal (La Jolla, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "A fractional-N PLL includes a reference oscillator, a multi-modulus divider-based phase-error-to-digital converter driven by the reference oscillator, a digital loop filter, and a digitally controlled oscillator. Digital-to-time to converter mismatch noise cancellation digital logic is between the phase-erro...