US Patent Issued to TEXAS INSTRUMENTS on March 17 for "Bias scaling for n-bit constrained hardware acceleration" (Indian Inventors)

ALEXANDRIA, Va., March 17 -- United States Patent no. 12,579,213, issued on March 17, was assigned to TEXAS INSTRUMENTS Inc. (Dallas).

"Bias scaling for n-bit constrained hardware acceleration" was invented by Anshu Jain (Bangalore, India), Manu Mathew (Bangalore, India), Kumar Desappan (Bangalore, India) and Anand Anil Pathak (Bangalore, India).

According to the abstract* released by the U.S. Patent & Trademark Office: "In described examples, an integrated circuit includes a memory storing weights and biases, an N-bit fixed point matrix operations accelerator, and a processor. Starting with a first convolution layer, a convolution layer modeled using the processor receives input feature values. A feature scale and weight scale are reduce...