US Patent Issued to Taiwan Semiconductor Manufacturing on Sept. 22 for "Forming isolation regions with low parasitic capacitance and reduced damage" (Taiwanese Inventor)

ALEXANDRIA, Va., Sept. 24 -- United States Patent no. 12,745,613, issued on Sept. 22, was assigned to Taiwan Semiconductor Manufacturing Co. Ltd. (Hsinchu, Taiwan).

"Forming isolation regions with low parasitic capacitance and reduced damage" was invented by Tzu-Ging Lin (Kaohsiung City, Taiwan).

According to the abstract* released by the U.S. Patent & Trademark Office: "A method includes forming a plurality of semiconductor regions, forming a plurality of gate stacks, wherein the plurality of gate stacks are on first portions of the plurality of semiconductor regions, and etching the plurality of gate stacks to form a plurality of openings in the plurality of gate stacks. The plurality of openings include a first opening in a first gate ...