US Patent Issued to Taiwan Semiconductor Manufacturing on May 12 for "Performance optimization by sizing gates and source/drain contacts differently for different transistors" (Taiwanese Inventors)

ALEXANDRIA, Va., May 12 -- United States Patent no. 12,628,406, issued on May 12, was assigned to Taiwan Semiconductor Manufacturing Co. Ltd. (Hsin-Chu, Taiwan).

"Performance optimization by sizing gates and source/drain contacts differently for different transistors" was invented by Li-Hui Chen (Hsinchu County, Taiwan), Chun-Hung Chen (Hsinchu, Taiwan) and Jhon Jhy Liaw (Hsinchu County, Taiwan).

According to the abstract* released by the U.S. Patent & Trademark Office: "A first transistor includes a first gate, a first source/drain, and a first source/drain contact disposed over the first source/drain. The first gate has a first dimension measured in a first lateral direction. The first source/drain contact has a second dimension measure...