ALEXANDRIA, Va., Feb. 17 -- United States Patent no. 12,557,346, issued on Feb. 17, was assigned to TAIWAN SEMICONDUCTOR MANUFACTURING Co. LTD. (Hsinchu, Taiwan).
"Source/drain epitaxial layer profile" was invented by Gulbagh Singh (Tainan, Taiwan), Hsin-Chi Chen (Tainan, Taiwan) and Kun-Tsang Chuang (Miaoli, Taiwan).
According to the abstract* released by the U.S. Patent & Trademark Office: "The present disclosure describes a method that mitigates the formation of facets in source/drain silicon germanium (SiGe) epitaxial layers. The method includes forming an isolation region around a semiconductor layer and a gate structure partially over the semiconductor layer and the isolation region. Disposing first photoresist structures over the g...