US Patent Issued to Synopsys on July 7 for "Signoff-safe multi-corner reduction for static timing analysis" (American, Irish Inventors)

ALEXANDRIA, Va., July 7 -- United States Patent no. 12,675,622, issued on July 7, was assigned to Synopsys Inc. (Sunnyvale, Calif.).

"Signoff-safe multi-corner reduction for static timing analysis" was invented by Brian D. Clerkin (Lusk, Ireland), Subramanyam Sripada (Hillsboro, Ore.), Praveen Ghanta (Palo Alto, Calif.), Peivand Tehrani (Camarillo, Calif.) and Xihui Li (Dublin).

According to the abstract* released by the U.S. Patent & Trademark Office: "A first set of timing paths may be selected in an integrated circuit (IC) design. A first set of timing slack values may be calculated for the first set of timing paths across a first set of corners. A dominant corner may be selected in the first set of corners based on the first set of ti...