US Patent Issued to STMicroelectronics International on Oct. 20 for "Circuit and method for on-chip leakage detection and compensation for memories" (Indian Inventors)

ALEXANDRIA, Va., Oct. 21 -- United States Patent no. 12,770,694, issued on Oct. 20, was assigned to STMicroelectronics International N.V. (Geneva).

"Circuit and method for on-chip leakage detection and compensation for memories" was invented by Arpit Vijayvergia (Bhopal, India) and Vikas Rana (Noida, India).

According to the abstract* released by the U.S. Patent & Trademark Office: "An integrated circuit includes a memory array and a memory read circuitry for reading data from the memory array. The memory read circuitry includes a leakage current compensation circuit. The leakage current compensation circuit senses the leakage current in a bitline of the memory array during a read operation and generates a leakage compensation current to ...