US Patent Issued to STMicroelectronics International on May 26 for "Time interleaving circuit having glitch mitigation" (Indian Inventor)

ALEXANDRIA, Va., May 26 -- United States Patent no. 12,640,717, issued on May 26, was assigned to STMicroelectronics International N.V. (Geneva).

"Time interleaving circuit having glitch mitigation" was invented by Aradhana Kumari (Greater Noida, India).

According to the abstract* released by the U.S. Patent & Trademark Office: "Provided is a time interleaving circuit to mitigate glitches. A first loading stage outputs first data representative of first serialized data. A second loading stage generates second serialized data. The second loading stage receives the first data output by the first loading stage. In response to the first data having a first state, the time interleaving circuit inverts the second serialized data to generate sec...