US Patent Issued to Silicon Storage Technology on Sept. 1 for "Masking sparse inputs and outputs in neural network array" (California Inventors)

ALEXANDRIA, Va., Sept. 1 -- United States Patent no. 12,724,562, issued on Sept. 1, was assigned to Silicon Storage Technology Inc. (San Jose, Calif.).

"Masking sparse inputs and outputs in neural network array" was invented by Hieu Van Tran (San Jose, Calif.), Stephen Trinh (San Jose, Calif.), Hoa Vu (Milpitas, Calif.), Stanley Hong (San Jose, Calif.) and Thuan Vu (San Jose, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Numerous examples are disclosed of a masking circuit for inputs and outputs in a neural network array. In one example, a system comprises a neural network array comprising a plurality of non-volatile memory cells arranged into rows and columns; and row circuits for respective rows in...