US Patent Issued to Silicon Genesis on March 17 for "Method of forming semiconductor device using high stress cleave plane" (California Inventors)

ALEXANDRIA, Va., March 17 -- United States Patent no. 12,582,012, issued on March 17, was assigned to Silicon Genesis Corp. (Fremont, Calif.).

"Method of forming semiconductor device using high stress cleave plane" was invented by Theodore E. Fong (Pleasanton, Calif.) and Michael I. Current (San Jose, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Implanting ions to form a cleave layer in a semiconductor device causes damage to sensitive materials such as high-K dielectrics. In a process for forming a cleave layer and repairing damage caused by ion implantation, ions are implanted through a circuit layer of a substrate to form a cleave plane. The substrate is exposed to a hydrogen gas mixture for a fi...