ALEXANDRIA, Va., Aug. 12 -- United States Patent no. 12,705,411, issued on Aug. 11, was assigned to SAMSUNG ELECTRONICS Co. Ltd. (Suwon-Si, South Korea).
"Method of optimizing area for logic cells and optimized logic cells" was invented by Abdur Rakheeb (Bengaluru, India), Sudhakar Gajjavarapu (Bengaluru, India) and Abhishek Ghosh (Bengaluru, India).
According to the abstract* released by the U.S. Patent & Trademark Office: "A method of optimizing area of logic cells includes creating a plurality of terminator cells for the logic cell, wherein the logic cell includes a plurality of cells. The plurality of terminator cells are placed at the boundary or edge of the logic cells."
The patent was filed on Feb. 22, 2023, under Application No. ...