US Patent Issued to QUALCOMM on Oct. 20 for "Processor that mitigates side channel attacks by refraining from allocating an entry in a data TLB for a missing load address when the load address misses both in a data cache memory and in the data TLB and the load address specifies a location without a valid address translation or without permission to read from the location" (California, Texas Inventors)

ALEXANDRIA, Va., Oct. 21 -- United States Patent no. 12,769,550, issued on Oct. 20, was assigned to QUALCOMM Inc. (San Diego).

"Processor that mitigates side channel attacks by refraining from allocating an entry in a data TLB for a missing load address when the load address misses both in a data cache memory and in the data TLB and the load address specifies a location without a valid address translation or without permission to read from the location" was invented by John G. Favor (San Francisco) and Srivatsan Srinivasan (Cedar Park, Texas).

According to the abstract* released by the U.S. Patent & Trademark Office: "A microprocessor for mitigating side channel attacks includes a memory subsystem that receives a load operation that speci...