US Patent Issued to QUALCOMM on May 12 for "Charge-sensitive DRAM access timing control" (Indian Inventors)

ALEXANDRIA, Va., May 12 -- United States Patent no. 12,625,614, issued on May 12, was assigned to QUALCOMM Inc. (San Diego).

"Charge-sensitive DRAM access timing control" was invented by Darshan Kumar Nandanwar (Bangalore, India), Sanku Mukherjee (Bangalore, India) and Arvind Garg (Bangalore, India).

According to the abstract* released by the U.S. Patent & Trademark Office: "DRAM access timing may be controlled based on charge remaining in cells of a DRAM row. DRAM timing and thus latency may be reduced in instances in which repeated row accesses are directed to the same row within an amount of time during which the row cell capacitances remain highly charged. In response to a row precharge, the row address may be stored in a table. Then,...