US Patent Issued to Micron Technology on April 7 for "Methods used in forming a memory array comprising strings of memory cells including insulator walls in a through-array-via region" (Idaho Inventors)

ALEXANDRIA, Va., April 7 -- United States Patent no. 12,598,972, issued on April 7, was assigned to Micron Technology Inc. (Boise, Idaho).

"Methods used in forming a memory array comprising strings of memory cells including insulator walls in a through-array-via region" was invented by Alyssa N. Scarbrough (Boise, Idaho), M. Jared Barclay (Middleton, Idaho), John D. Hopkins (Meridian, Idaho) and Jordan D. Greenlee (Boise, Idaho).

According to the abstract* released by the U.S. Patent & Trademark Office: "A memory array comprising strings of memory cells comprises laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers above a conductor tier. The conductor tier is...