US Patent Issued to LONGITUDE LICENSING on May 12 for "Testing circuitry in a stacked semiconductor device using through silicon vias" (Japanese Inventor)

ALEXANDRIA, Va., May 12 -- United States Patent no. RE50,887, issued on May 12, was assigned to LONGITUDE LICENSING Ltd. (Dublin).

"Testing circuitry in a stacked semiconductor device using through silicon vias" was invented by Yoshiro Riho (Tokyo).

According to the abstract* released by the U.S. Patent & Trademark Office: "A method of testing a semiconductor device includes providing a first wafer that includes a first surface, a second surface that is allocated at an opposite side of the first surface, a first electrode penetrating the first wafer from the first surface to the second surface, and a pad formed on the first surface and coupled electrically with the first electrode, providing a second wafer that includes a second electrode...