US Patent Issued to Lattice Semiconductor on Feb. 24 for "Scalable data structure for aggregating BMC input and output over serdes for data center and server nodes system and method" (California, Texas Inventors)

ALEXANDRIA, Va., Feb. 24 -- United States Patent no. 12,561,264, issued on Feb. 24, was assigned to Lattice Semiconductor Corp. (Hillsboro, Ore.).

"Scalable data structure for aggregating BMC input and output over serdes for data center and server nodes system and method" was invented by Satheesh Chellappan (El Dorado Hills, Calif.) and Munir Ahmad (Leander, Texas).

According to the abstract* released by the U.S. Patent & Trademark Office: "A system, method, and computer program product for communicating between a baseboard management controller (BMC) and a host processing module (HPM) are provided. A PCIe endpoint receives packets, such as TLPs, over a first communication interface from a BMC, where payloads in packets include transactio...