US Patent Issued to Kalray on Oct. 20 for "Management of multiple cache line invalidations" (French Inventor)

ALEXANDRIA, Va., Oct. 21 -- United States Patent no. 12,769,659, issued on Oct. 20, was assigned to Kalray (Montbonnot Saint Martin, France).

"Management of multiple cache line invalidations" was invented by Vincent Ray (Allevard, France).

According to the abstract* released by the U.S. Patent & Trademark Office: "A processor comprising multiple cores, each including a local cache; multiple memory banks forming a shared memory for the multiple cores; a directory-based cache coherence protocol manager, comprising for each core a circuit for consolidating multiple cache line invalidation commands received from the different memory banks. The consolidation circuit comprises a counter for counting the received invalidation commands; and a sel...