US Patent Issued to Intel on Sept. 15 for "Level-of-detail determination using major squared and efficient clamping in a graphics environment" (Washington, California Inventors)

ALEXANDRIA, Va., Sept. 15 -- United States Patent no. 12,737,960, issued on Sept. 15, was assigned to Intel Corp. (Santa Clara, Calif.).

"Level-of-detail determination using major squared and efficient clamping in a graphics environment" was invented by William Zorn (Woodinville, Wash.), Theo Drane (El Dorado Hills, Calif.) and Brett Saiki (Seattle).

According to the abstract* released by the U.S. Patent & Trademark Office: "An apparatus to facilitate level-of-detail (LoD) determination using major squared and efficient clamping in a graphics environment is disclosed. The apparatus includes a processing core comprising a rasterizer hardware unit to: identify components of partial derivative vectors corresponding to two adjacent lines of a...