US Patent Issued to Intel on May 26 for "Scalable sparse matrix multiply acceleration using systolic arrays with feedback inputs" (American, Indian Inventors)

ALEXANDRIA, Va., May 26 -- United States Patent no. 12,639,398, issued on May 26, was assigned to Intel Corp. (Santa Clara, Calif.).

"Scalable sparse matrix multiply acceleration using systolic arrays with feedback inputs" was invented by Subramaniam Maiyuran (Gold River, Calif.), Jorge Parra (El Dorado Hills, Calif.), Supratim Pal (Bangalore, India), Ashutosh Garg (Folsom, Calif.), Shubra Marwaha (Folsom, Calif.), Chandra Gurram (Folsom, Calif.), Darin Starkey (Roseville, Calif.), Durgesh Borkar (Folsom, Calif.) and Varghese George (Folsom, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Described herein is a graphics processor including a plurality of processing clusters coupled with a host interface...