US Patent Issued to Intel on Feb. 24 for "Two transistor memory cells with source-drain coupling in one transistor" (Oregon, California Inventors)

ALEXANDRIA, Va., Feb. 24 -- United States Patent no. 12,563,724, issued on Feb. 24, was assigned to Intel Corp. (Santa Clara, Calif.).

"Two transistor memory cells with source-drain coupling in one transistor" was invented by Sagar Suthram (Portland, Ore.), Abhishek A. Sharma (Hillsboro, Ore.), Wilfred Gomes (Portland, Ore.), Anand S. Murthy (Portland, Ore.), Tahir Ghani (Portland, Ore.) and Pushkar Sharad Ranade (San Jose, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "IC devices implementing 2T memory cells with source-drain coupling in one transistor, and related assemblies and methods, are disclosed herein. In particular, 2T memory cells presented herein use first and second transistors arranged s...