ALEXANDRIA, Va., Aug. 5 -- United States Patent no. 12,699,829, issued on Aug. 4, was assigned to Intel Corp. (Santa Clara, Calif.).

"Methods and apparatus to generate circuit timing constraint predictions using machine learning" was invented by Lekshmi C (Bangalore, India), Sourav Saha (Bangalore, India), Anmol Khatri (Bangalore, India), Raj Chetan Yadav (Vadodara, India), Rakshit Bazaz (Bangalore, India) and Shivangi Gupta (Hosur, India).

According to the abstract* released by the U.S. Patent & Trademark Office: "Methods, apparatus, systems, and articles of manufacture are disclosed for methods and apparatus to generate I/O timing constraint predictions for system-on-chips using machine learning. An apparatus is disclosed herein compris...