US Patent Issued to GlobalWafers on June 30 for "Methods of manufacturing semiconductor-on-insulator wafers having charge trapping layers with controlled stress" (Missouri, Illinois Inventors)

ALEXANDRIA, Va., July 16 -- United States Patent no. 12,672,525, issued on June 30, was assigned to GlobalWafers Co. Ltd. (Hsinchu, Taiwan).

"Methods of manufacturing semiconductor-on-insulator wafers having charge trapping layers with controlled stress" was invented by Charles R. Lottes (Ballwin, Mo.), Jeffrey L Libbert (O'Fallon, Mo.) and Qingmin Liu (Glen Carbon, Ill.).

According to the abstract* released by the U.S. Patent & Trademark Office: "A method of preparing a multilayer structure includes providing a single crystal semiconductor handle substrate that includes a front surface, a back surface, a circumferential edge joining the front and back surfaces, and a central plane between the front and back surfaces. The single crystal s...