US Patent Issued to Advantest on June 23 for "Write latency testing systems and methods" (California Inventors)

ALEXANDRIA, Va., July 15 -- United States Patent no. 12,665,042, issued on June 23, was assigned to Advantest Corp. (Tokyo).

"Write latency testing systems and methods" was invented by Srdjan Malisic (San Jose, Calif.) and Chi Yuan (San Jose, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "The testing system comprises a processor and a local memory on a motherboard and an extension memory device under test (DUT). The local memory corresponds to a first address range within system memory and the extension memory DUT associated with a second address range within the system memory. The processor is operable to direct write latency testing of the extension memory DUT, including recording write latency meas...