US Patent Issued to Adeia Semiconductor Technologies on Aug. 25 for "Integrated circuit assemblies with rigid layers used for protection against mechanical thinning and for other purposes, and methods of fabricating such assemblies" (California Inventors)

ALEXANDRIA, Va., Aug. 25 -- United States Patent no. RE51,016, issued on Aug. 25, was assigned to Adeia Semiconductor Technologies LLC (San Jose, Calif.).

"Integrated circuit assemblies with rigid layers used for protection against mechanical thinning and for other purposes, and methods of fabricating such assemblies" was invented by Guilian Gao (Campbell, Calif.), Cyprian Emeka Uzoh (San Jose, Calif.), Charles G. Woychik (San Jose, Calif.), Hong Shen (Palo Alto, Calif.), Arkalgud R. Sitaram (Cupertino, Calif.), Liang Wang (Milpitas, Calif.), Akash Agrawal (San Jose, Calif.) and Rajesh Katkar (Milpitas, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Die (110) and/or undiced wafers and/or multichip mod...