US Patent Issued to Adeia Semiconductor Solutions on July 21 for "Method of forming nanosheet field effect transistors with partial inside spacers" (New York, Vermont Inventors)

ALEXANDRIA, Va., July 21 -- United States Patent no. 12,690,251, issued on July 21, was assigned to Adeia Semiconductor Solutions LLC (San Jose, Calif.).

"Method of forming nanosheet field effect transistors with partial inside spacers" was invented by Michael A. Guillorn (Cold Springs, N.Y.), Terence B. Hook (Jericho, Vt.), Robert R. Robison (Colchester, Vt.), Reinaldo A. Vega (Mahopac, N.Y.) and Rajasekhar Venigalla (Hopewell Junction, N.Y.).

According to the abstract* released by the U.S. Patent & Trademark Office: "A method of forming a nanosheet device, including forming a channel stack on a substrate, where the channel stack includes at least one nanosheet channel layer and at least one sacrificial release layer, forming a stack cov...