US Patent Issued to Adeia Semiconductor Solutions on July 14 for "Method of forming copper interconnect structure with manganese barrier layer" (New York Inventors)

ALEXANDRIA, Va., July 14 -- United States Patent no. 12,685,112, issued on July 14, was assigned to Adeia Semiconductor Solutions LLC (San Jose, Calif.).

"Method of forming copper interconnect structure with manganese barrier layer" was invented by Daniel C. Edelstein (White Plains, N.Y.), Son V. Nguyen (Schenectady, N.Y.), Takeshi Nogami (Schenectady, N.Y.), Deepika Priyadarshini (Guilderland, N.Y.) and Hosadurga Shobha (Niskayuna, N.Y.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Low capacitance and high reliability interconnect structures and methods of manufacture are disclosed. The method includes forming a copper based interconnect structure in an opening of a dielectric material. The method further ...