GENEVA, June 24 -- SOITEC filed a patent application (EP2025/081500) for “METHOD FOR PREPARING A SILICON-ON-INSULATOR SUBSTRATE COMPRISING AN ELECTRICAL CHARGE TRAPPING LAYER AND HAVING PREDETERMINED CHARACTERISTICS”. With publication no. WO/2026/114600, here are the other details related to the patent application:
Kind: Initial Publication with ISR [A1]
IPC: H10P 90/00
Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).
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