INTERNATIONAL PATENT: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC. FILES APPLICATION FOR "BUILD UP BONDING LAYER PROCESS AND STRUCTURE FOR LOW TEMPERATURE BONDING"

GENEVA, April 8 -- ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC. (3025 Orchard ParkwaySan Jose, California 95134) filed a patent application (PCT/US2025/045976) for "BUILD UP BONDING LAYER PROCESS AND STRUCTURE FOR LOW TEMPERATURE BONDING" on Sep 11, 2025. With publication no. WO/2026/072333, the details related to the patent application was published on Apr 02, 2026.

Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).

Inventor(s): FOUNTAIN, Gaius, Gillman, Jr. (3025 Orchard ParkwaySan Jose, California 95134), MROZEK, Pawel (3025 Orchard ParkwaySan Jose, California 95134), HUDSON, George, Carlton (3025 Orchard Par...