Huawei Just Rewrote the Rules of Chip Design With Its New Tau Scaling Law and the Chinese EDA Industry Has Lined Up Behind Empyrean and Peking University to Catch Synopsys and Cadence

SHENZHEN, June 14 -- Huawei's announcement of the Tau Scaling Law and the corresponding LogicFolding three-dimensional-integrated-circuit architecture, delivered at the company's Hong Kong Electronic Design Automation conference in late May, has set out the most distinctive single Chinese-semiconductor-development response to the cumulative U.S. export-control framework that the industry has produced to date, and the cumulative Chinese electronic-design-automation industry has now lined up behind the Huawei framework with Empyrean Technology's Argus 3D physical-verification platform, Primarius Technologies' cumulative analog-and-mixed-signal-design framework expansion, Semitronix's cumulative yield-management platform, and the Peking Univ...