Japan Intellectual Property Rights: CONFIGURATION METHOD OF LOGIC CIRCUIT USING PHOTORELAY, LOGIC CIRCUIT USING PHOTORELAY, LOGIC CIRCUIT SIMULATOR, AND PROGRAM

Japan, Sept. 18 -- GSEC CO LTD has got intellectual property rights for 'CONFIGURATION METHOD OF LOGIC CIRCUIT USING PHOTORELAY, LOGIC CIRCUIT USING PHOTORELAY, LOGIC CIRCUIT SIMULATOR, AND PROGRAM.' Other related details are as follows:

Application Number: JP,2025-077883

Category (FI): H03K17/78@K,H03K19/20

Stage: PROBLEM TO BE SOLVED: To provide a logic circuit using a photorelay having high reliability.SOLUTION: A logic circuit includes a first resistance group and a second resistance group consisting of resistances according to the input of a logic function, and supplies a power supply voltage to one terminal on the input side of a photorelay through the resistance of the first resistance group in response to an input with a logic va...