Intellectual Property India Publishes Patent Application for Verification-Gated Machine Unlearning For Language Model Synchronization

MUMBAI, India, Sept. 22 -- Intellectual Property India has published a patent application (202641110058 A) filed by Vellore Institute Of Technology on September 14, 2026, for Verification-Gated Machine Unlearning For Language Model Synchronization.

Inventors include Dr M Rajasekhara; Dhanush Konduru; and Dr Nirmala M.

The application for the patent was published on September 18, 2026, under issue no. 38/2026.

Abstract: ABSTRACT VERIFICATION-GATED MACHINE UNLEARNING FOR LANGUAGE MODEL SYNCHRONIZATION A computer-implemented method for synchronizing a language model (120) with a versioned dataset includes receiving, by a dataset version differ (110), a first dataset version and a second dataset version, each dataset version comprising a plu...