Intellectual Property India Publishes Patent Application for Variable Oversampling Delta-Sigma Analog-To-Digital Converter And Operating Method Thereof

MUMBAI, India, June 22 -- Intellectual Property India has published a patent application (202641036981 A) filed by Indian Institute Of Technology Dharwad on March 26, 2026, for Variable Oversampling Delta-Sigma Analog-To-Digital Converter And Operating Method Thereof.

Inventors include Pavan Kumar Km; and Prof. Naveen Kadayinti.

The application for the patent was published on June 12, 2026, under issue no. 24/2026.

Abstract: Disclosed is a variable oversampling rate delta-sigma analog-to-digital converter (ADC) (100) incorporating an LSB-first successive approximation register (SAR) (108a) as quantizer. The ADC 100 receives an analog input signal, generates an error signal using a summation node (102), and processes the error signal thro...