Intellectual Property India Publishes Patent Application for System And Method For Bounded-Error Timing Protection In Gnss-Disciplined Clock Devices Under Spoofing

MUMBAI, India, Sept. 14 -- Intellectual Property India has published a patent application (202611087130 A) filed by Ravi Anand on July 16, 2026, for System And Method For Bounded-Error Timing Protection In Gnss-Disciplined Clock Devices Under Spoofing.

Inventors include Ravi Anand; and Julie Devi.

The application for the patent was published on September 11, 2026, under issue no. 37/2026.

Abstract: A system (100) and method for bounded-error timing protection of a GNSS-disciplined clock device under spoofing are disclosed. The system (100) comprises a radio- frequency front-end unit (110), a multi-channel baseband processing unit (120), a clock-solution computation engine (130), a cross-channel consistency monitoring module (140), a disc...