MUMBAI, India, June 24 -- Intellectual Property India has published a patent application (202617062743 A) filed by International Business Machines Corporation on May 18, 2026, for Stacked Fet With Asymmetric Cell Boundary.
Inventors include Xie, Ruilong; Choi, Kisik; Reboh, Shay; Clevenger, Lawrence; Alfred; Anderson, Brent, Alan; Chu, Albert, Manhee; Lanzillo, Nicholas, Anthony; and Vega, Reinaldo.
The application for the patent was published on June 12, 2026, under issue no. 24/2026.
Abstract: Embodiments of present invention provide a semiconductor structure. The structure includes a first cell unit including a first set of field-effect-transistors (FETs), a first cell boundary made of a first gate cut region, and a second cell bounda...