Intellectual Property India Publishes Patent Application for Secure Non-Volatile Memory And Integrated Circuit Including Said Non-Volatile Memory

MUMBAI, India, Oct. 12 -- Intellectual Property India has published a patent application (202617067530 A) filed by Thales Dis France Sas on May 29, 2026, for Secure Non-Volatile Memory And Integrated Circuit Including Said Non-Volatile Memory.

Inventors include Naura, David; and Giovinazzi, Thierry.

The application for the patent was published on October 09, 2026, under issue no. 41/2026.

Abstract: The invention relates to non-volatile memory circuit (300) comprising at least one memory block (310) having a plurality of memory cells (MC1,1 to MCm,n) located at intersection of bit lines (BL1 to BLn) and word lines (WL1 to WLm), and at least one line decoder (350, 380) receiving internal address bits for selecting one word line and one bit...