MUMBAI, India, June 26 -- Intellectual Property India has published a patent application (202641073547 A) filed by Mlr Institute Of Technology on June 13, 2026, for Risc-V Processor Suitable For Implementation On Fpga And Asic Platforms.

Inventors include Mr. Haribabu Yadav Kolusu; Ms. G. Sravani; Mr. G. Abhinaya Goud; and Mr. J. Adithya.

The application for the patent was published on June 19, 2026, under issue no. 25/2026.

Abstract: The present invention relates to the design and implementation of a 32-bit pipelined processor based on the open-standard RV32I Version 2.0 instruction set architecture of RISC-V. The processor adopts a Reduced Instruction Set Computer (RISC) architecture, enabling simplified instruction execution and reduc...