Intellectual Property India Publishes Patent Application for Low-Power Dual-Loop Fast-Transient Low-Dropout Voltage Regulator With Load-Tracking Zero Compensation And Dynamic Cascode Biasing

MUMBAI, India, Nov. 6 -- Intellectual Property India has published a patent application (202641131150 A) filed by Sophrosyne Technologies Private Limited on November 02, 2026, for Low-Power Dual-Loop Fast-Transient Low-Dropout Voltage Regulator With Load-Tracking Zero Compensation And Dynamic Cascode Biasing.

Inventors include Soman Purushothaman; and Manish Srivastava.

The application for the patent was published on November 06, 2026, under issue no. 45/2026.

Abstract: ABSTRACT LOW-POWER DUAL-LOOP FAST-TRANSIENT LOW-DROPOUT VOLTAGE REGULATOR WITH LOAD-TRACKING ZERO COMPENSATION AND DYNAMIC CASCODE BIASING Embodiments relate to a low-power dual-loop fast-transient low-dropout voltage regulator (100) comprising a slow/DC feedback loop (11...