Intellectual Property India Publishes Patent Application for Fpga Implementation Of High Speed And Area Efficient Carry Skip Adder

MUMBAI, India, July 13 -- Intellectual Property India has published a patent application (202541000667 A) filed by Hiindusthan Institute Of Technology on January 03, 2025, for Fpga Implementation Of High Speed And Area Efficient Carry Skip Adder.

Inventors include Dr. C. Natarajan; S. Suganya; Dr. B. Paulchamy; Dr. A. Purushothaman; and K. Anantheeswar.

The application for the patent was published on July 10, 2026, under issue no. 28/2026.

Abstract: 7. ABSTRACT OF THE INVENTION: Adder is one of the main building blocks in Digital Signal Processing (DSP) applications. There are different types of adders, each have their own advantages and disadvantages. The carry skip adder is efficient when compared to all other adders. Modified Carry Sk...