Intellectual Property India Publishes Patent Application for Arithmetic Processing System And Method For Performing Rounding-Error-Compensated Digital Arithmetic

MUMBAI, India, Sept. 28 -- Intellectual Property India has published a patent application (202641111839 A) filed by Vellore Institute Of Technology, Chennai on September 17, 2026, for Arithmetic Processing System And Method For Performing Rounding-Error-Compensated Digital Arithmetic.

Inventors include Sathyavathi N. S; and Augusta Sophy Beulet P..

The application for the patent was published on September 25, 2026, under issue no. 39/2026.

Abstract: An arithmetic processing system (100) and method (400) for performing rounding-error-compensated digital arithmetic. System includes arithmetic unit that perform arithmetic operation on input operand to produce arithmetic result having bits beyond target precision. Bit identification unit ide...