MUMBAI, India, Nov. 13 -- Intellectual Property India has published a patent application (202641126435 A) filed by K. S. Rangasamy College Of Technology on October 23, 2026, for A Low-Complexity Distributed-Arithmetic Lstm Accelerator For Real-Time Ecg Arrhythmia Classification.
Inventors include Dr. P. Kumar; Dr. S. Pradeep; Mrs. C. Saranya; Dr. S. Arulpriya; Ms. C. Santhiya; and Ms. S. Srikiruthika.
The application for the patent was published on November 13, 2026, under issue no. 46/2026.
Abstract: The present invention describes a low-complexity FPGA-based hardware accelerator for real-time ECG arrhythmia classification using a Distributed Arithmetic-based Long Short-Term Memory (DA-LSTM) architecture. The system receives ECG signals...