Intellectual Property India Publishes Patent Application for 3d Memory Cells And Array Architectures And Processes

MUMBAI, India, Sept. 14 -- Intellectual Property India has published a patent application (202617060274 A) filed by Neo Semiconductor, Inc. on May 12, 2026, for 3d Memory Cells And Array Architectures And Processes.

Inventors include Hsu, Fu-Chang; and Huang, Richard J..

The application for the patent was published on September 11, 2026, under issue no. 37/2026.

Abstract: Various 3D memory cells, array architectures, and processes are disclosed. In an embodiment, a memory cell structure is provided that is formed by a process of alternately depositing multiple semiconductor layers and sacrificial layers to form a stack, forming vertical bit line holes through the stack using a deep trench process, forming floating bodies in the semicondu...