Intellectual Property India Publishes Patent Application for 'Methodologies/Processes For Capturing Defects At Gate Level In Silicon Based Mos And Bipolar Semiconductor Devices' Filed by Indian Space Research Organization

MUMBAI, India, April 17 -- Intellectual Property India has published a patent application (202641042472 A) filed by Indian Space Research Organization, Bangalore, Karnataka, on April 2, for 'methodologies/processes for capturing defects at gate level in silicon based mos and bipolar semiconductor devices.'

Inventor(s) include Sarat Kumar Dash; Md. Nazrul Islam; and C Ramachandra.

The application for the patent was published on April 17, under issue no. 16/2026.

According to the abstract released by the Intellectual Property India: "The work describes methodologies / processes for capturing buried/hidden defects / contamination / structural damages at gate level in a silicon-based MOS and Bipolar semiconductor device. Generally, gate leve...