MUMBAI, India, May 29 -- Intellectual Property India has published a patent application (202641042170 A) filed by Cvr College Of Engineering, Hyderabad, Telangana, on April 2, for 'a predictive workload-aware adaptive body biasing (p-abb) system for performance normalization in deep sub-micron vlsi circuits.'

Inventor(s) include P. Naveen Kumar; and M. Srinu.

The application for the patent was published on May 29, under issue no. 22/2026.

According to the abstract released by the Intellectual Property India: "The P-ABB system is an invention that enables deep sub-micron VLSI design to be able to use adaptive body biasing with respect to workload. This is achieved through the use of an on-chip process monitor and a workload signature anal...