MUMBAI, India, May 1 -- Intellectual Property India has published a patent application (202641050615 A) filed by Bvrit Hyderabad College Of Engineering For Women; M. Kalpana Chowdary; Y Alekhya; and G Purnachandrarao, Hyderabad, Telangana, on April 21, for 'a low-power vlsi architecture for ecg arrhythmia detection using shiftbased neural network computation.'

Inventor(s) include M. Kalpana Chowdary; Y Alekhya; and G Purnachandrarao.

The application for the patent was published on May 1, under issue no. 18/2026.

According to the abstract released by the Intellectual Property India: "The present invention discloses a low-power VLSI architecture for electrocardiogram (ECG) arrhythmia detection using shift-based neural network computation. ...